[Ghdl-discuss] Comparison of ghdl and Cadence Incisive

[Simon Thijs de Feber]

I'll need to do a functional comparison between GHDL and Cadence Incisive.
I just can throw a IP and it's TB at it to do some checks. However this is
not really an intelligent way to do it.

How could I approach this ?
Take the test suite of GHDL and run this in both simulators ?

best regards

Simon

[t***@free.fr]

Good question.
I'm pretty sure incisive support of VHDL is almost complete, but I have never used it.
You can try to run the VHDL test suite but I fear you will spend time to setup it for incisive and the results will be difficult to analyze or even not interesting at all.

Do you want to know missing features from VHDL or from incisive?

Tristan.

Post by Simon Thijs de Feber
I'll need to do a functional comparison between GHDL and Cadence Incisive.
I just can throw a IP and it's TB at it to do some checks. However this is
not really an intelligent way to do it.
How could I approach this ?
Take the test suite of GHDL and run this in both simulators ?
best regards
Simon

[Rene Doss]

What would you compare?

A performance check?

Or what?

Post by Simon Thijs de Feber
I'll need to do a functional comparison between GHDL and Cadence Incisive.
I just can throw a IP and it's TB at it to do some checks. However
this is not really an intelligent way to do it.
How could I approach this ?
Take the test suite of GHDL and run this in both simulators ?
best regards
Simon
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[Simon Thijs de Feber]

I need to prove that GHDL is giving me the same results as Incisive.
W'll be taping-out a design some where this year.
Although I have confidence GHDL is following the VHDL LRM I do not like
unexpected surprises after all.

br,

ST

Post by Rene Doss
What would you compare?
A performance check?
Or what?
I'll need to do a functional comparison between GHDL and Cadence Incisive.
I just can throw a IP and it's TB at it to do some checks. However this is
not really an intelligent way to do it.
How could I approach this ?
Take the test suite of GHDL and run this in both simulators ?
best regards
Simon
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[Tristan Gingold]

Hello, in that case you'd better to use your design and your testbench.
They are certainly representative of your coding style and you know them well.

Regards.

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Post by Simon Thijs de Feber
I need to prove that GHDL is giving me the same results as Incisive.
W'll be taping-out a design some where this year.
Although I have confidence GHDL is following the VHDL LRM I do not like
unexpected surprises after all.
br,
ST

Post by Rene Doss
What would you compare?
A performance check?
Or what?
I'll need to do a functional comparison between GHDL and Cadence Incisive.
I just can throw a IP and it's TB at it to do some checks. However this is
not really an intelligent way to do it.
How could I approach this ?
Take the test suite of GHDL and run this in both simulators ?
best regards
Simon
_______________________________________________
Ghdl-discuss mailing
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https://mail.gna.org/listinfo/ghdl-discuss

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